CPU RightMark Lite 2005 v1.3 Released
Samsung Develops 3D Memory Package
Apacer Releases New Very Low Profile Memory Modules
CPU RightMark Lite 2005 v1.3 Released
The RightMark team updated their CPU RightMark Lite 2005 benchmark to version 1.3. The new features include:
- Increased number of objects by default so that Solver and Renderer modules run at comparable speeds.
You can download the new version from here.
Samsung Develops 3D Memory Package
Samsung Electronics announced that it has developed a small-footprint, wafer-level processed stack package (WSP) of high-density memory chips using "through silicon via" (TSV) interconnection technology. WSP reduces the physical size of a stacked set of semiconductor chips, while improving overall performance. WSP can be applied to all types of hybrid packages, including memory and processors.
Samsung' first WSP is a 16Gbit memory solution that stacks eight 2Gb NAND chips. The WSP generates a smaller multi-chip package (MCP), which is the current mainstream solution for designing miniaturized, high-capacity memory devices. Samsung's eight-chip WSP prototype sample, which vertically stacks eight 50µm, 2Gb NAND flash die, is 0.56 millimeters in height.
The chips in today's MCPs are connected by wire bonding, which requires vertical gaps between dies that are tens of microns wide and horizontal spaces on the package board that are hundreds of microns wide to accommodate the wire connections. By contrast, WSP forms micron-sized holes that penetrate through the silicon vertically to connect circuits directly, eliminating the need for gaps of extra space and wires protruding beyond the sides of the die. Due to these advantages, WSP has a 15-percent smaller footprint and is 30 percent thinner than an equivalent wire-bonded MCP solution.
Another distinct advantage of Samsung's WSP technology is that it introduces a much simplified process for the TSV. Instead of using a conventional dry etching method, a tiny laser drills the TSV holes. This reduces production cost significantly as it eliminates the typical photolithography-related processes required for mask-layer patterning and also shortens the dry-etching process needed to penetrate through a multi-layer structure.
Also, WSP reduces the length of the interconnections, resulting in an approximately 30-percent increase in performance from reduced electrical resistance.
Initially, Samsung will apply its WSP technology to the production of NAND-based memory cards for mobile applications and other consumer electronics in early 2007. Later, the company will extend the packaging technique to high-performance system-in-package (SiP) solutions, and high-capacity DRAM stack packages including DRAM modules used in server designs that require fast data processing.
Source: Samsung Electronics
Apacer Releases New Very Low Profile Memory Modules
Apacer Technology is releasing new Very Low Profile (VLP) DDR memory modules in 1GB and 2GB capacities. The 2GB ECC Registered DIMM uses advanced BGA technology to stack two layers of chips on each side of the memory module, giving it a low profile with a height of 18.30 mm and width of 30.35 mm. VLP DIMMs are intended for vertical sockets on blade servers.
Apacer's VLP DIMMs will be available in April.
Source: Apacer Technology
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