Tyan Introduces Dual-Core 1P Server Platform IDF San Francisco: Intel SHARP Switching Between 3G, GPRS, WiMAX, Bluetooth, Etc. IDF San Francisco: Napa In The Spotlight IDF San Francisco: Intel Bets On "New Innovations" IDF San Francisco: Intel Publishes New Roadmap Tyan Introduces Dual-Core 1P Server Platform Tyan introduced the Tomcat i7230A (S5160) 1P server board with dual-core support, dedicated virtualization hardware support, and high-performance throughput. The Tomcat i7230A uses the Intel E7230 "Mukilteo" chipset with an optimized 1U layout design on all components to allow for improved airflow over all parts of the motherboard. In addition, Tyan has integrated the following server-class features into the Tomcat i7230A:
The Tomcat i7230A (S5160) is currently sampling to OEMs, and will reach mass production levels towards the end of Q3´05. Source: Tyan
IDF San Francisco: Intel SHARP Switching Between 3G, GPRS, WiMAX, Bluetooth, Etc. At IDF Intel introduced the new concept developed together with University of Washington. It is called "SHARP" (System for Human Activity, Recognition and Prediction). Intel SHARP is a chip that enables to work in any wireless network, including 3G, GPRS, WiMAX and Bluetooth with smooth transition from one network to another. The area of application is rather wide, since SHARP pretends to be universal. This includes PDA connectivity with other devices, monitoring devices and detectors, RFID sensors and scanners. In other words, any devices that require wireless connections. At that Intel promises simplicity of use, low deployment costs and "unobtrusiveness". SHARP will be used to build wireless networks in which standards like 3G, WiMAX, Wi-Fi, UWB, Bloetooth, RFID will co-exist. And SHARP-based devices will, I´ll say it again, work independently on standards. According to provisional information, the chip will operate at 2.4/5 GHz clock rates, consume ~170mW. Its core will be made using 90nm process. The transparent switching between standards will be provided by IEEE 802.21. Since this is only a concept, there´s no availability date. But we believe this will surely come in handy, if released. IDF San Francisco: Napa In The Spotlight Let´s continue the virtual tour around IDF that is taking place in San Francisco, USA. Alexander Vorobiev, who is our reporter at the event, sent us a gallery about Napa-based solutions. Firstly, a notebook on the new chipset: Panasonic paid much attention to powering the machine. These batteries provide up to 10 hours of operation: And this is the same notebook, disassembled: Don´t be surprised about the heatsink size. Since this is a sample, it requires desktop cooling. Commercialized machines will feature smaller heatsinks (and, perhaps, lower clock rates). And now let´s take a look at the details of the Napa platform itself: This gallery doesn´t have a slide about Intel PRO WIRELESS 3945ABG adapter that is, of course, a part of the platform. This adapter supports IEEE 802.11 a/b/g, 802.11e QoS, Cisco extensions, Wake on WLAN (WoWLAN) and innovations reducing noise from other emission sources. IDF San Francisco: Intel Bets On "New Innovations" Ok, we have shed some light on Intel´s CPU roadmap, so now it´s high time to understand what exactly is to be done. In brief, there are two key vectors: transition to multi-core architecture and power consumption reduction. Speaking of the former, after being a little late at the dual-core race start, Intel makes all efforts to catch up with AMD. As you can see on the picture, in all segments, including desktop, mobile and server, the share of multi-core processors will grow. And by 2007 almost all servers and also 90% of notebooks and desktops will be based on multi-core CPUs. Speaking of codenames, in 2006-2007 we are promised Raidland (multi-way servers on 2-4-core Whitefield), Bensley (dual-way servers on Woodcrest), Glidewell (dual-way workstations on Woodcrest), Bridge Creek (home desktops on Conroe), Averill (office PCs on Conroe) and Napa (notebooks on Merom). As for the power consumption reduction, developers seemingly bet on the transition to 65nm process and methods from the Centrino arsenal. As these two vectors converge, the performance/power consumption ratio should grow. This is further illustrated by the Xeon roadmap below: On the final picture you can see that high performance and low power consumption converge and are mixed with a mysterious ingredient called "New Innovations". What Intel hides behind this euphemism still remains a secret. IDF San Francisco: Intel Publishes New Roadmap At IDF in San Francisco, USA, Intel published its newest CPU roadmap which promises a surprise. Firstly, the massive transition to 65nm process technology is to be conducted at a rather furious rate. As you can see on the picture below, already by the mid-2006 the amount of Intel´s 65nm and 90nm processors will be equal, and by the end of the year 65nm will dominate. Secondly, the dual-core expansion will continue. In Q3 2006 their amount will be levelled with the amount of single-core processors, and by the year-end, dual-core products will make 3/4 of Intel CPUs. Speaking of names in the server, desktop and mobile series, here´s another picture: Now we´re getting closer to a surprise. The company plans a serious breakthrough in the performance/power consumption ratio seemingly by increasing both numerator and denominator. As a result, a processor codenamed "Woodcrest" is expected to have this rato tripled comparing to the existing Irwindale... ...But the desktop Conroe is promised a groundbreaking improvement of 5 times Irwindale´s performance/power consumption ratio! A logical question would be "How?" Well, read our next news about Intel´s CPU architecture and you will know. And here´s a surprise we promised: on the photo below you can see the first demo system based on the aforementioned Conroe! Source: Our reporter at IDF
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