Elpida Develops First 25-nm Process DRAM

Elpida Memory announced it had developed a 2-gigabit DDR3 SDRAM using the 25-nm process for memory manufacturing. In doing this, Elpida has achieved the smallest chip size for a 2-gigabit SDRAM.

The newly developed 25-nm DRAM process technology requires 30% less cell area per bit compared with Elpida's 30-nm process. The chip output for a 2-gigabit DDR3 SDRAM wafer using the new process is about 30% higher versus 30-nm.

The 25-nm process 2-gigabit DDR3 SDRAM can support ultra-fast performance above DDR3-1866 (1866 Mbps) and is compliant with low-voltage 1.35V high-speed DDR3L-1600 (1600 Mbps).

The new SDRAM is an eco-friendly as it contributes to lower energy consumption by PCs and digital consumer electronics. It outperforms Elpida's 30-nm process products by saving on electric current (15% less operating current and 20% less current when on standby).

By the end of 2011, Elpida also plans to begin volume production of 4-gigabit DDR3 SDRAM products using the 25-nm process. Compared with the 30-nm process, a 44% increase in chip output per wafer is expected for 4-gigabit DDR3. In addition, the new 25-nm process will be used to support further development of Mobile RAM, Elpida's mainstay memory product.

Both sample shipments of the new 25-nm 2-gigabit DDR3 SDRAM and volume production are expected to begin in July 2011.

Source: Elpida Memory

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