IBM Unveils Fastest On-Chip Dynamic Memory Technology
In papers presented at the International Solid State Circuits Conference (ISSCC), IBM revealed a first-of-its-kind, on-chip memory technology that features the fastest access times ever recorded in eDRAM (embedded dynamic random access memory).
This new technology, designed using IBM’s Silicon-on-Insulator (SOI) for high-performance at low power, vastly improves microprocessor performance in multi-core designs and speeds the movement of graphics in gaming, networking, and other image intensive, multi-media applications.
The technology is expected to be a key feature of IBM’s 45nm (nanometer) microprocessor roadmap and will become available beginning in 2008.
IBM’s new eDRAM technology, designed in stress-enabled 65nm SOI using deep trench, improves on-processor memory performance in about one-third the space with one-fifth the standby power of conventional SRAM (static random access memory).
Some of eDRAM Specifications:
- Cell size: 0.126 mm²
- Power supply: 1 V
- Availability: 98.7%
- Tile: 1K RowX16 Col X146 (2Mb)
- AC power: 76 mW
- Standby keep alive Power: 42 mW
- Random cycle time: 2ns
- Latency: 1.5ns
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