Altera's Stratix II FPGAs Protect Intellectual Property
Altera announced the availability of a comprehensive Stratix II FPGA design security solution to protect intellectual property (IP). The easy-to-implement Stratix II design security solution uses advanced encryption standard (AES) along with a 128-bit non-volatile key, and is suited for applications requiring design flexibility and protection.
The Stratix II design security solution offers benefits for a number of applications and market environments:
- The Stratix II solution allows different security keys to be programmed into different Stratix II devices, enabling product version control and customization.
- The ability to encrypt configuration files in Stratix II FPGAs ensures royalty income for IP vendors, since they can track exact IP usage.
- The tampering protection of the Stratix II design security solution prevents undesired modification of gaming machines.
- The Stratix II design security solution allows military customers to protect core technology and information, and prevent tampering.
- ASSP vendors can test market and adapt the functionality in their ASSPs via Stratix II FPGAs while protecting their IP.
Designers can easily implement the design security solution, which includes application notes and various on-board and off-board key programming methods, to suit different manufacturing flows. They can select from an EthernetBlaster cable, JTAG Technologies' in-system programming tools, System General's socket programming equipments, in-circuit testers and key programming services offered by major Altera distributors.
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