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Rambus´s Redwood: more details

These days Rambus announced additional information about its high-speed Redwood interface with up to 6.4Gbps throughput. If you remember, this theme arised after Sony Corporation, SCEI (Sony Computer Entertainment) and Toshiba licensed Redwood technology early in January along with the Yellowstone interface supposed for the Cell project ("supercomputer-on-a-chip" being developed by IBM Microelectronics to be implemented with 0.10µm and smaller process technology. Sony plans to use it in future PlayStation 3.)

According to Rambus, Redwood parallel interface will be realized as a special core for embedding into processors and interface chips. Redwood bus can be used to connect CPU with Northbridge and Northbridge with Southbridge. Besides, Redwood can be used to connect comm processors with requried circuitry. In the consumer electronics segment Redwood can be implemented to connect HDTV encoders and processors in HDTV sets.

Redwood is compatible with the current industrial protocols such as LVDS, HyperTransport, Rapid I/O and SDI-4. Redwood´s high data throughput is achieved with the help of previously announced Rambus FlexPhase technology being a way of adjusting bus data flow for each chip pin receives a signal in a time unit. As I guess this is about signal latencies equal for each chip pin. According to the company, this will allow to significantly reduce PCB cost prices and energy consumption as requires only four board layers.

According to provisional data, Redwood core is likely to be integrated into both BGA, and CSP bodies.

Deeper into technicals: FlexPhase signalling technology, Redwood underlie, is based on the Differential Rambus Signaling Levels (DRSL) protocol instead of the previous pseudo-differential RSL. It features 200mV amplitude excursion (1.2V stands for logical 0, 1.0V for logical 1), including ODT (On Die Termination) and duplex signalling familiar from the Yellowstone.

DRSL is backward compatible with LVDS (Low Voltage Differential Signaling). So, I guess there are no more blank spots left (or maybe these technicals turned into a large blank for you :). This is the company vision of a PC based on RDRAM; RaSer serial interconnect for RDRAM-chipset and chipset-peripheral controllers; Redwood serial interface for CPU-Northbridge and Northbridge-Southbridge; Yellowstone bus for the most critical locations like in-between GPU and video memory):

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