Memory Module Analysis. Part 18: Super Talent DDR2-800 Modules

We proceed with the low-level analysis of the most important characteristics of high-performance DDR2 memory modules using our RightMark Memory Analyzer. Our previous reviews in this segment were devoted to Corsair DDR2-667UL, DDR2-1000 and ADATA DDR2-800 modules. And in this article we are going to review another high-performance offer from Super Talent — a 2 GB pair of DDR2-800 modules.

Manufacturer Information

Module manufacturer: Super Talent Technology Corporation
Manufacturer of module chips: unknown
Web site of the module manufacturer:
http://www.supertalent.com/SuperTalentMemory/products/product_guide.php?catlog=Desktop
http://www.supertalent.com/Home/ru.php (Russian mirror)

Module Exterior

Photo of the memory module

Module Part Number

There is no DDR2 part number expansion as well as any technical documentation on this series of modules on the official web site. Product Detail page specifies that the product with Part Number T800UX2GC4 is a dual channel kit of overclocked DDR2-800 modules with the total capacity of 2 GB (2 x 1GB), 128M x 64. The modules operate in this mode with 4-3-4-8 timings. There is no information on voltages, so let's assume that the modules can operate in this mode at standard 1.8 V.

SPD chip data

Description of the general SPD standard:

JEDEC Standard No. 21-C, 4.1.2 - SERIAL PRESENCE DETECT STANDARD, General Standard

Description of the specific SPD standard for DDR2:

JEDEC Standard No. 21-C, 4.1.2.10 - Appendix X: Specific SPDs for DDR2 SDRAM (Revision 1.2)

Parameter	Byte	Value	Expansion
Fundamental Memory Type	2	08h	DDR2 SDRAM
Number of Row Addresses on this assembly	3	0Eh	14 (RA0-RA13)
Number of Column Addresses on this assembly	4	0Ah	10 (CA0-CA9)
Number of DIMM Banks	5	61h	2 physical banks
Data Width of this assembly	6	40h	64 bit
Voltage Interface Level of this assembly	8	05h	SSTL 1.8V
SDRAM Cycle time (t_CK) at maximum supported CAS# latency (CL X)	9	3Dh	3.75 ns (266.7 MHz)
DIMM configuration type	11	00h	Non-ECC
Refresh Rate/Type	12	82h	7.8125 ms — 0.5x reduced self-refresh
Primary SDRAM Width (organization type) of the memory module chips	13	08h	x8
Error Checking SDRAM Width (organization type) of the memory chips in the ECC module	14	00h	Not defined
Burst Lengths Supported (BL)	16	0Ch	BL = 4, 8
Number of Banks on SDRAM Device	17	04h	4
CAS Latency (CL)	18	38h	CL = 5, 4, 3
Minimum clock cycle (t_CK) at reduced CAS# latency (CL X-1)	23	3Dh	3.75 ns (266.7 MHz)
Minimum clock cycle (t_CK) at reduced CAS# latency (CL X-2)	25	50h	5.00 ns (200.0 MHz)
Minimum Row Precharge Time (t_RP)	27	3Ch	15.0 ns 4, CL = 5 4, CL = 4 3, CL = 3
Minimum Row Active to Row Active delay (t_RRD)	28	1Eh	7.5 ns 2.0, CL = 5 2.0, CL = 4 1.5, CL = 3
Minimum RAS to CAS delay (t_RCD)	29	3Ch	15.0 ns 4, CL = 5 4, CL = 4 3, CL = 3
Minimum Active to Precharge Time (t_RAS)	30	28h	45.0 ns 10.67, CL = 5 10.67, CL = 4 8, CL = 3
Module Bank Density	31	80h	512 MB
Write recovery time (t_WR)	36	3Ch	15.0 ns 4, CL = 5 4, CL = 4 3, CL = 3
Internal write to read command delay (t_WTR)	37	1Eh	7.5 ns 2.0, CL = 5 2.0, CL = 4 1.5, CL = 3
Internal read to precharge command delay (t_RTP)	38	1Eh	7.5 ns 2.0, CL = 5 2.0, CL = 4 1.5, CL = 3
SDRAM Device Minimum Active to Active/Auto Refresh Time (t_RC)	41, 40	37h, 00h	55.0 ns 14.67, CL = 5 14.67, CL = 4 11, CL = 3
SDRAM Device Minimum Auto-Refresh to Active/Auto-Refresh Command Period (t_RFC)	42, 40	69h, 00h	105.0 ns 28, CL = 5 28, CL = 4 21, CL = 3
Maximum device cycle time (t_CKmax)	43	80h	8.0 ns
SPD Revision	62	12h	Revision 1.2
Checksum for Bytes 0-62	63	B3h	179 (true)
Manufacturer’s JEDEC ID Code	64-71	00h, 43h, 41h, 54h, 44h, 00h, 00h, 00h	Wrong («CATD»)
Module Part Number	73-90	00h...00h	Not defined
Module Manufacturing Date	93-94	06h, 01h	Year 2006, Week 1
Module Serial Number	95-98	00h, 00h, 00h, 00h	Not defined

SPD contents look rather strange. According to these data, the modules support three CAS# latencies — 5, 4, and 3. But the first (CL X) and the second (CL X-1) values correspond to the same cycle time - 3.75 ns (266.7 MHz, DDR2-533). That is the modules under review are sort of DDR2-533(!) modules — not even DDR2-667, to say nothing of DDR2-800. According to our multiple reviews of DDR2 memory modules, this irresponsible approach to programming SPD content is quite rare. Nevertheless, let's return to the examination of SPD content in Super Talent modules. The third CAS# latency (CL X-2) expectedly corresponds to higher cycle time - 5.0 ns (that is DDR2-400 mode). The main timings schemes for the first two cases (DDR2-533 mode) can be written as 5-4-4-11 (rounded) and 4-4-4-11 (rounded) correspondingly, 3-3-3-8 — for the last case (DDR2-400). You may have already noticed that such timings differ much from the official "4-3-4-8" for DDR2-800 mode.

We can also note a slightly increased minimum refresh to active/refresh command period (t_RFC = 105 ns), which is more typical of "regular" rather than high-speed DDR2 modules. SPD contains the correct SPD Revision Number (1.2) and even the manufacturing date (Week 1, 2006). At the same time, Manufacturer’s JEDEC ID Code is wrong (its lettering part — 43h, 41h, 54h, 44h — can be decoded as CATD; I don't understand what it has to do with the real manufacturer) and there is no information on Part Number and Serial Number of the modules.

Testbed configurations

Testbed 1

CPU: Intel Pentium 4 Extreme Edition 3.73 GHz (Prescott N0, 2 MB L2) operating at 2.8 GHz (200.0 MHz x14)
Chipset: Intel 975X, 200.0 MHz FSB
Motherboard: ASUS P5WD2-E Premium, BIOS 0206 dated 12/21/2005
Memory: 2x1024 MB Super Talent DDR2-800

Testbed 2

CPU: Intel Pentium 4 Extreme Edition 3.73 GHz (Prescott N0, 2 MB L2) operating at 3.73 GHz (266.7 MHz x14)
Chipset: Intel 975X, 266.7 MHz FSB
Motherboard: ASUS P5WD2-E Premium, BIOS 0206 dated 12/21/2005
Memory: 2x1024 MB Super Talent DDR2-800

Test Results

Performance tests

In the first series of tests we used the timing scheme, set in BIOS Setup by default (Memory Timings: "by SPD"). As SPD does not contain proper data for DDR2-667 and DDR2-800 modes (that's how we tested our modules), the ASUS P5WD2-E motherboard used in the testbed set timings by guess-work — 4-5-5-14 in DDR2-667 mode and 4-6-6-16 in DDR2-800 mode.

Parameter	DDR2-667		DDR2-800
Parameter	Testbed 1	Testbed 2^*	Testbed 1	Testbed 2^*
Timings	4-5-5-14	4-5-5-14	4-6-6-16	4-6-6-16
Average memory read bandwidth, MB/sec	5484	6574	5629	6913
Average memory write bandwidth, MB/sec	2177	2414	2258	2602
Max. memory read bandwidth, MB/sec	6797	8666	6838	8955
Max. memory write bandwidth, MB/sec	4282	5672	4282	5679
Minimum Pseudo-Random Access Latency, ns	54.6	47.7	49.5	44.7
Maximum Pseudo-Random Access Latency, ns	64.1	55.4	59.1	52.1
Minimum Random Access Latency^**, ns	111.5	98.6	102.7	93.3
Maximum Random Access Latency^**, ns	135.7	117.7	125.8	112.1
Minimum Pseudo-Random Access Latency, ns (without hardware prefetch)	84.2	73.8	75.4	68.8
Maximum Pseudo-Random Access Latency, ns (without hardware prefetch)	110.2	93.3	102.4	88.6
Minimum Random Access Latency^**, ns (without hardware prefetch)	112.0	99.8	102.9	94.2
Maximum Random Access Latency^**, ns (without hardware prefetch)	137.9	119.6	130.3	114.0

^*FSB frequency — 266.7 MHz

^**16MB block size

Nevertheless, according to the above results, the modules under review offer quite high performance (maximum real memory bandwidth in real tests on processors with 2MB L2 Cache is close to typical 6.8 GB/s in case of 200 MHz FSB and 9.0 GB/s in case of 266 MHz FSB). Memory access latencies are also quite low — you can see them go down when you set a higher memory frequency or a higher FSB clock (the effect is more pronounced in the latter case). In this connection the least latencies are obtained in DDR2-800 mode with 266 MHz FSB.

Stability tests

Timing values, except for t_CL, were adjusted "on the fly" due to the built-in RMMA feature that allows to change dynamically memory settings supported by the chipset. Memory operating stability was evaluated with an auxiliary utility RightMark Memory Stability Test, included into RMMA.

Parameter	DDR2-667		DDR2-800
Parameter	Testbed 1	Testbed 2^*	Testbed 1	Testbed 2^*
Timings	4-4-3	4-4-3	4-4-3	4-4-3
Average memory read bandwidth, MB/sec	5503	6615	5693	7017
Average memory write bandwidth, MB/sec	2294	2589	2446	2827
Max. memory read bandwidth, MB/sec	6821	8726	6848	9057
Max. memory write bandwidth, MB/sec	4282	5674	4282	5684
Minimum Pseudo-Random Access Latency, ns	54.5	47.5	49.0	44.2
Maximum Pseudo-Random Access Latency, ns	64.0	55.1	58.5	51.5
Minimum Random Access Latency^**, ns	108.5	95.3	97.2	87.6
Maximum Random Access Latency^**, ns	133.0	114.4	121.2	106.3
Minimum Pseudo-Random Access Latency, ns (without hardware prefetch)	84.0	72.7	75.1	68.6
Maximum Pseudo-Random Access Latency, ns (without hardware prefetch)	109.8	93.0	102.4	87.8
Minimum Random Access Latency^**, ns (without hardware prefetch)	109.6	96.4	98.6	88.4
Maximum Random Access Latency^**, ns (without hardware prefetch)	135.8	116.2	125.1	108.1

^*FSB frequency — 266.7 MHz

^**16MB block size

Amazingly, minimum timings in DDR2-667 mode are rather average — just 4-4-3 (as usual, the last timing, t_RAS, is ignored — you may reduce it down to 4 without any consequences). Note that we used the standard voltage of 1.8 V, as the manufacturer doesn't specify the necessity to use a higher voltage. This timing scheme is the best in terms of stability — these modules actually allow even "tougher" timings in DDR2-667 mode — up to 3-3-3, but it was accompanied by errors in the stability test.

It's still more amazing that in the faster DDR2-800 mode these modules were stable... with the same 4-4-3 timings (its equivalent in DDR2-667 mode is 3.3-3.3-2.5, which is a tad more conservative than the unstable 3-3-3 configuration).

As usual, faster timings allow to increase memory bandwidth and reduce latencies. But I cannot say that this effect is noticeable — for example, maximum latency reduction is demonstrated in random walks - approximately 6 ns, that is less than 5%. The increase in memory bandwidth is even less noticeable, as it does not exceed 1-2%.

Bottom line

Super Talent DDR2-800 memory modules, a new offer on the Russian market, are sterling representatives of the high-end class. These modules demonstrate good speed characteristics and "timing overclocking potential" — they can operate in DDR2-800 mode at nominal 1.8 V and up to 4-4-3 timings. The only drawback of the modules under review is improper quality of the SPD content that belong to some DDR2-533 modules from an unknown manufacturer, which may lead to certain problems in automatic detection of their parameters by a motherboard BIOS (theoretically it may lead to complete incompatibility). On the other hand, the fact that these modules are intended for enthusiasts who must know everything about manual configuration of various system parameters, including memory settings, probably extenuates this drawback.

Super Talent DDR2-800 Modules are kindly provided
by the master distributor of Super Talent memory modules
MA LABS

Dmitri Besedin (dmitri_b@ixbt.com)
April 14, 2006

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