iXBT Labs - Computer Hardware in Detail






Memory Module Analysis. Part 28:
Corsair DOMINATOR TWIN2X2048-10000C5DF
Memory Modules With EPP Support

We continue our analysis of the primary features of high-speed DDR2 memory modules today by taking a look at a new high-end product from the Corsair DOMINATOR series, the 2GB DDR2-1250 dual-channel kit. We will be analyzing performance of the modules using our RightMark Memory Analyzer tool, which is freely available on the web. These memory modules are the pinnacle of DDR2 technology, and also might have reached the final capacity of the DDR2 standard. This means that these modules very well might be the last DDR2-based modules in the Corsair Dominator series of products.

Manufacturer information

Module manufacturer: Corsair Memory

Chip manufacturer: unknown

Manufacturer's website: http://www.corsairmemory.com/corsair/dominator.html

Module exterior

The modules that are being reviewed look identical to the Corsair TWIN2X2048-9136C5D and TWIN2X2048-8888C4D entry level DOMINATOR products. One feature that distinguishes products in the DOMINATOR series is the new Dual-path Heat Xchange cooling technology. In essence, Corsair claims this cooling solution removes more heat in two ways; by using extruded aluminum heatsinks with “optimized” fins to increase airflow and dissipate more heat and by using a dedicated heatsink for the PCB itself.

These modules can be additionally cooled by the supplied DOMINATOR Airflow Fans system which creates direct airflow to modules for improved heat removal.

Module part number

Unfortunately, at the Corsair company website we were unable to find a part number guide for the DOMINATOR DDR2 series.

The TWIN2X2048-10000N5DF product sheet states that the kit consists of 2 x 1GB CM2X1024-10000N5D modules. The modules support Enhaned Performance Profiles (Serial Presence Detect extension), an open standard jointly created by Corsair and NVIDIA. EPP allows memory settings to be automatically optimized on motherboards that support EPP. It has been developed primarily to make overclocking easier.

Corsair guarantees that the modules will work at DDR2-1250 speeds with EPP timings of 5-5-5-18-2T and a rather «extreme» voltage of 2.4 V on motherboards based on the NVIDIA nForce 680i SLI EVGA chipset. At that voltage setting, by default the SPD sets memory speed to DDR2-800 mode at 5-5-5-18 timings.

SPD Data

General SPD standard specification:

DDR2 SPD standard specification:

Parameter Byte Value Interpretation
Fundamental memory type 2 08h DDR2 SDRAM
Total number of address lines per module's row 3 0Eh 14 (RA0-RA13)
Total number of address lines per module's column 4 0Ah 10 (CA0-CA9)
Total number of physical banks in memory module 5 61h 2 physical banks
External data bus of memory module 6 40h 64-bit
Power supply voltage 8 05h SSTL 1.8V
Minimum length of clock signal period (tCK) with maximum CAS# latency (CL X) 9 25h 2.50 (400.0 MHz)
Module configuration type 11 00h Non-ECC
Type and method of data regeneration 12 82h 7.8125 ms 0.5x reduced self-regeneration
External interface data bus width (organization type) of memory chips being used 13 08h x8
External interface data bus width (organization type) of ECC-module memory chips being used 14 00h Indeterminate
Burst length (BL) 16 0Ch BL = 4, 8
Number of logical banks for each chip in module 17 04h 4
Supported CAS# latency durations (CL) 18 30h CL = 5, 4
Minimum length of clock signal period (tCK) with reduced CAS# latency (CL X-1) 23 37h 3.70 (270.3 MHz)
Minimum length of clock signal period (tCK) with reduced CAS# latency (CL X-2) 25 00h Indeterminate
Minimum recharge period for data in a row (tRP) 27 32h 12.5
5.0, CL = 5
3.37, CL = 4
Minimum delay in adjacent row activation (tRRD) 28 1Eh 7.5
3.0, CL = 5
2.03, CL = 4
Minimum delay between RAS# and CAS# (tRCD) 29 32h 12.5
5.0, CL = 5
3.37, CL = 4
Minimum pulse length of RAS# signal (tRAS) 30 2Dh 45.0
18.0, CL = 5
12.16, CL = 4
Capacity of one physical bank of memory module 31 80h 512 MB
Regeneration after write period (tWR) 36 3Ch 15.0
6.0, CL = 5
4.05, CL = 4
Internal delay between WRITE and READ commands (tWTR) 37 1Eh 7.5
3.0, CL = 5
2.03, CL = 4
Internal delay between READ and PRECHARGE commands (tRTP) 38 1Eh 7.5
3.0, CL = 5
2.03, CL = 4
Minimum row cycle time (tRC) 41, 40 37h, 00h 55.0
22.0, CL = 5
14.86, CL = 4
Period between self-regeneration commands (tRFC) 42, 40 69h, 00h 105.0
42.0, CL = 5
28.38, CL = 4
Maximum length of clock signal period (tCKmax) 43 80h 8.0 ns
SPD revision number 62 12h Revision 1.2
Checksum for bytes 0-62 63 90h 144 (correct)
Manufacturer identification code according to JEDEC 64-71 7Fh, 7Fh, 9Eh Corsair
Module part number 73-90 CM2X1024-10000C5D
Module manufacture date 93-94 FFh, FFh Indeterminate
Module serial number 95-98 FFh, FFh, FFh, FFh Indeterminate

Taking a look at the SPD chip on the modules, the part number of the SPD ROM of the modules under review today matches up to the number of the SPD chip on the previously reviewed CM2X1024-9136C5D and CM2X1024-8888C4D modules. The maximum performance that today's modules are designed for is a 2.5 ns cycle time (400 MHz frequency, DDR2-800). The first of the supported values is tCL = 5, while the complete timing scheme is 5-5-5-18, which agrees with what the manufacturer states in its brief documentation for the memory kit. Lower CAS# signal latency values (CL X-1 = 4) can be achieved using a non-standard clock signal period of 3.7 ns (typical for Corsair memory modules), which corresponds to a frequency of approximately 270 MHz. Most likely , this setting is meant for DDR2-533 mode with a 3.75 ns cycle time. An improper clock signal period value leads to non-integer values in the timing scheme, which can be written (rounded to one decimal place) as 4-3.4-3.4-12.2 and rounded up to integer values, as 4-4-4-13. As a matter of fact, DDR2-533 is obsolete in today's day and age, especially for such high-speed modules, so these values hardly bear any true significance. In our opinion, this setting should have been excluded from the SPD memory quite some time ago.

Although the manufacturer identification code along with the module part number is stated correctly, as is true with other Corsair modules, the SPD chip does not give details regarding the manufacturing date and serial number. In this case, they are filled with a value of FFh.

Now let us look at the most critical information in the «non-standard» part of the SPD, bytes 99-127 of the SPD memory which contains the EPP profiles.

EPP standard specification:

Parameter Byte(s) (bits) Value Interpretation
EPP identification string 99-101 4E566Dh SPD EPP support present
Type of EPP profiles 102 B1h Extended profiles
Optimum performance profile 103 (1:0) 01h Profile 1
Used profiles 103 (7:4) 02h Profile 0: absent
Profile 1: present
Profile #1
Power supply voltage 116 (6:0) 18h 2.4 V
Address transmission delay
(Addr CMD rate)
116 (7) 01h 2T
Cycle time (tCK) 121 16h 1.60 ns (625.0 MHz)
CAS# latency (tCL) 122 20h 5
Minimum delay between RAS# and CAS# (tRCD) 123 20h 8.00 ns (5.0)
Minimum recharge period for data in a row (tRP) 124 20h 8.00 ns (5.0)
Minimum pulse length of RAS# signal (tRAS) 125 1h 28.0 ns (17.5)
Regeneration after write period (tWR) 126 20h 8.0 ns (5.0)
Minimum row cycle time (tRC) 127 18h 24.0 ns (15.0)

The modules being examined support Enhanced Performance Profiles and contain information for two «extended» profiles. Of the two enhanced profiles, only the second one (Profile #1) is operative and is, naturally, marked as recommended by default. This profile has a cycle time of 1.60 ns, meaning it has a frequency of 625 MHz; a «DDR2-1250» rating. The timings of this profile can not be completely represented using integers and is written as 5-5-5-17.5, which, evidently, should be interpreted by motherboards supporting EPP as 5-5-5-18. Delays in address-command interface for this profile amount to 2T while the modules' power supply voltage is at 2.4 V. The minimum row cycle time (tRC), is a mere 15 cycles of external data bus, a rather small value which comes as a bit of a surprise, primarily because it turns out to be less than the tRASparameter, which is 17.5 (18) cycles of external data bus. It is possible that this in fact is a mistake that was made on the manufacturer's part when coding the EPP profile data.

Testbed configuration

Testbed #1

  • CPU: AMD Athlon 64 X2 5200+ (Socket AM2), nominal clock rate 2.6 GHz (200 x 13)
  • Chipset: NVIDIA nForce 590 SLI
  • Motherboard: ASUS CROSSHAIR, BIOS version 0502 (01/02/2007)

Testbed #2

  • CPU: Intel Core 2 Duo E6600, nominal clock rate 2.4 GHz (266 x 9)
  • Chipset: NVIDIA nForce 680i SLI
  • Motherboard: NVIDIA nForce 680i reference board 6A61ITT2, BIOS version 2.053.76 (04/01/2007)

Test results

We examined the TWIN2X2048-10000C5DF modules using two platforms equipped with the following processors: AMD Athlon 64 X2 5200+ (ASUS CROSSHAIR motherboard, testbed #1) and Intel Core 2 Duo E6600 (NVIDIA reference motherboard with nForce 680i chipset, testbed #2). Both motherboards support EPP standard providing compatibility with the modules being reviewed.

The modules were tested in the following modes:

  1. Nominal: regular CPU clock rate, memory frequency of 400 MHz (DDR2-800), EPP profile information not used.
  2. Optimal, using information of EPP profile, allowing CPU overclocking (up to 15%) and enabling to reach maximum recommended memory frequency.
  3. Maximum memory overclocking mode with rate that allows CPU overclocking.

In all cases the memory modules were provided with additional cooling by the supplied DOMINATOR Airflow cooling system.

Parameter Testbed #1 Testbed #2
CPU clock rate, MHz
(FSB rate x FID)
Memory frequency, MHz
(DDR2 MHz)
Memory timings by default, voltage 5-5-5-18-2T,
1.8 V
2.4 V
1.85 V
2.4 V
2.4 V
Minimum memory timings, voltage 3-3-3-2T,
2.4 V
2.4 V
2.4 V
2.4 V
Average read bandwidth, GB/s,
1 core
Average write bandwidth, GB/s,
1 core
Max. read bandwidth, GB/s,
1 core
Max. write bandwidth, GB/s,
1 core
Average read bandwidth, GB/s,
2 cores
Average write bandwidth, GB/s,
2 cores
Max. read bandwidth, GB/s,
2 cores
Max. write bandwidth, GB/s,
2 cores
Minimum pseudorandom access latency*, ns 28.6
Minimum random access latency*, ns 80.7

* - For a 32 MB block.

In standard DDR2-800 mode the platform based on the AMD Athlon 64 X2 5200+ CPU (testbed #1) uses the standard timing scheme of 5-5-5-18-2T which is stored in the standard part of the SPD memory. The timing scheme, which we managed to achieve in this case while raising power supply voltage for the modules up to the manufacturer recommended level of 2.4 V, was the smallest possible values we could achieve (for the given platform): 3-3-3-2T. However, we cannot say that the timings affected the speed characteristics of the memory subsystem in a fundamental way. The reason is because the relatively low CPU clock rate which we had to use at this stage of testing (200x12 = 2400 MHz) slowed down our system.

The most surprising result we saw in our tests came when trying to use maximum performance mode (with settings from the EPP profile). Under this mode, the CPU would be overclocked 15%, meaning it would be hitting 3 GHz (300 MHz FSB x 10) — Using this performance profile we were not even able to boot into the system's operating system, let alone running stability tests and performance measurements. Moreover, neither the CPU nor the motherboard turned out to be «at fault», but rather the memory modules themselves were the culprit. We were able to successfully boot the system with the CPU overclocked to 3000 MHz (CPU core voltage in all cases was raised to 1.45 V) while we forced the memory to run at lower speeds. The maximum possible memory speed the modules reached using EPP profile data was a mere 500 MHz (i.e. «DDR2-1000»).

Further increasing the speed of the modules to 520 MHz led to errors during our memory stability tests. However, the slight overclock did not create a complete system failure.

The overclocking of the modules weren't a complete failue, as we were able to lower the module timings from 5-5-5-18-2T to rather small values of 4-4-3-2T. This is not a feat that all memory modules can achieve at DDR2-1000 speeds.

Let's move on to considering the results obtained with our second Intel Core 2 Duo E6600 CPU test platform based on the NVIDIA nForce 680i SLI chipset (testbed #2). Fortunately, all tests on this platform were successful. In standard DDR2-800 mode the Intel Core 2 Duo system, using standard settings from the SPD, ran at timings of 5-5-5-18-2T with nominal power supply voltage (1.85 V). By raising the voltage to 2.4 V, we succeeded in lowering the timings to the same values obtained on the first test platform — 3-3-3-2T. Furthermore, due to the NVIDIA nForce 680i SLI chipset allowing the use of timings up to 1-1-1 (!) we were able to get the BIOS to load at an even more impressive timing scheme; 3-3-2-2T. Loading the operating system to run tests proved impossible at those timings, though, as the system crashed. We were still glad that we got past the BIOS stage, however. Nevertheless, similar to the case of the AMD platform, the considerable decrease in memory timing s led to very small changes in the memory subsystem's actual speed, which is bound to a rather low CPU clock rate (2.4 GHz) along with chipset memory controller limitations.

The DDR2-1250 mode, which is stored in the in EPP profile, was practically achieved (memory bus frequency of 622 MHz, i.e. 1244 «DDR2 MHz») without overclocking the CPU at all. This is because of the nForce 680i SLI chipset's ability to tune to an asynchronous operating mode in a fairly flexible way — the ratio of the memory bus frequency to the system bus frequency on this chipset can take on various values (in this case — 35/15 = 2.333) with a small enough increment (1/15), which means an increment of memory bus frequency of about 18 MHz. The timing scheme in this case is the same as the EPP data — 5-5-5-18-2T, and the power supply voltage for the modules also conforms with the recommended 2.4 V. Despite the significant increase in memory frequency (from 400 to 622 MHz), differences in memory bandwidth values between these two operating modes turn out to be virtually unnoticeable (somewhat more evident are the differences between random ac cess latencies). This reconfirms that using such high-speed memory on the Intel platform (with not the most high-speed 2.4-GHz Intel Core 2 Duo E6600 CPU) ends up being completely unjustified.

Finally, we also evaluated the possibility of testing the modules at maximum frequency. In the process, we naturally overclocked the CPU also. The maximum memory frequency without loss of stability that we achieved came out to be 645 MHz («DDR2-1290») — barely below the «DDR2-1300» mark. The timing scheme in this case was automatically increased by the motherboard BIOS to 5-6-6-19-2T. Attempting to lower these timings led to system errors and instability.


The examined high-end modules from the Corsair DOMINATOR series, the TWIN2X2048-10000C5DF memory modules, left a good impression on us with its maximum frequency of DDR2-1250.

The only problem we saw in the tests was the somewhat limited compatibility of the modules with our AMD-based test platform, which consisted of an Athlon 64 X2 5200+ CPU along with an ASUS Crosshair motherboard. With this platform, the maximum bus frequency at which the modules were considered farily stable, was merely 500 MHz, or DDR2-1000. We are hoping that the uncovered problem is only an issue with our platform itself, namely the certain combination of CPU, motherboard and BIOS we were using, and not the AMD AM2 platform as a whole.

In regards to the Intel/NVIDIA platform, which was based on an Intel Core 2 Duo CPU and the nForce 680i chipset, the modules under review demonstrated exceptional compatibility and were fully operable under regular conditiona at DDR2-800 paired with record-low timings of 3-3-3-2T and a voltage level of 2.4 Volts. The maximum we reached with this platform was another record for us, and we ended up at a memory bus frequency of 645 MHz, which equates to DDR2-1290, at 2.4 Volts. The timings were automatically adjusted by the motherboard to 5-6-6-29-2T.

Corsair DOMINATOR memory modules,
NVIDIA nForce 680i motherboard
provided by Corsair Memory Russia

Dmitriy Besedin (dmitri_b@ixbt.com)
July 25, 2007

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