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Memory Module Analysis. Part 25: Corsair DOMINATOR Memory Modules (XMS2-9136C5D and XMS2-8888C4D) with EPP Support



We proceed with the analysis of the most important characteristics of high-performance DDR2 memory modules using our RightMark Memory Analyzer. Today we are going to examine another top product from Corsair — memory modules of the new DOMINATOR series, unofficial "DDR2-1142" and "DDR2-1111". They are designed to reveal potential of the new NVIDIA nForce 680i SLI platform.

Manufacturer Information

Module manufacturer: Corsair Memory
Manufacturer of module chips: unknown
Web site of the module manufacturer: http://www.corsairmemory.com/corsair/xms2.html

Exterior




Design of new DOMINATOR modules (the photo shows XMS2-9136C5D modules) suffered significant changes. First of all, these changes have to do with a principally new cooling technology, called Dual-path Heat Xchange (DHX(tm)). This technology consists in channelling the heat away in two ways — through BGA chip contacts to a PCB of the module as well as from the package of BGA chips to highly efficient heatsinks made of extruded aluminum.




DOMINATOR modules can also be cooled by the new system - DOMINATOR Airflow Fans. It creates a direct airflow to memory modules for improved heat dissipation and channelling the heat away from the memory modules. In our case, this cooling system came shipped with slower, but more extreme in terms of timings (as well as voltage) XMS2-8888C4D memory modules.

Module Part Number

XMS2-9136C5D




The manufacturer's web site does not publish the DDR2 Part Number expansion of XMS2 DOMINATOR series memory modules.

The datasheet on TWIN2X2048-9136C5D modules specifies that it's a bundle of two CM2X1024-9136C5D modules, 1 GB each. These modules support the open standard EPP (SPD extension), developed by Corsair and NVIDIA. It allows to configure memory modules for maximum performance automatically on motherboards that support this standard. The manufacturer guarantees that the modules will work in "DDR2-1142" mode with 5-5-5-15-2T timings from a EPP profile and at 2.1 V (such a low voltage for such a fast mode is reached owing to the DHX technology). At the same time, a default mode in the standard SPD section is the maximal standard DDR2-800 mode with 5-5-5-18 timings.

XMS2-8888C4D




As specified in their datasheet, TWIN2X2048-8888C4D modules have similar characteristics — it's a 2 GB bundle of two 1 GB modules CM2X1024-8888C4D, supporting EPP. These modules are guaranteed to work in "DDR2-1111" mode with EPP 4-4-4-12-2T timings. Such extreme (for such a fast mode) timings do not come for free. They require raising memory voltage to 2.4 V, also specified in EPP profile. We can say that our DDR2 memory modules are getting close to old DDR modules, which nominal voltage is 2.5 V.

SPD chip data

Description of the general SPD standard:

Description of the specific SPD standard for DDR2:

XMS2-9136C5D/XMS2-8888C4D

Parameter Byte Value Expansion
Fundamental Memory Type 2 08h DDR2 SDRAM
Number of Row Addresses on this assembly 3 0Eh 14 (RA0-RA13)
Number of Column Addresses on this assembly 4 0Ah 10 (CA0-CA9)
Number of DIMM Banks 5 61h 2 physical banks
Data Width of this assembly 6 40h 64 bit
Voltage Level 8 05h SSTL 1.8V
SDRAM Cycle time (tCK) at maximum supported CAS# latency (CL X) 9 25h 2.50 ns (400.0 MHz)
DIMM configuration type 11 00h Non-ECC
Refresh Rate/Type 12 82h 7.8125 ms — 0.5x reduced self-refresh
Primary SDRAM Width (organization type) of the memory module chips 13 08h x8
Error Checking SDRAM Width (organization type) of the memory chips in the ECC module 14 00h Not defined
Burst Lengths Supported (BL) 16 0Ch BL = 4, 8
Number of Banks on SDRAM Device 17 04h 4
CAS Latency (CL) 18 30h CL = 5, 4
Minimum clock cycle (tCK) at reduced CAS# latency (CL X-1) 23 37h 3.70 ns (270.3 MHz)
Minimum clock cycle (tCK) at reduced CAS# latency (CL X-2) 25 00h Not defined
Minimum Row Precharge Time (tRP) 27 32h 12.5 ns
5.0, CL = 5
3.37, CL = 4
Minimum Row Active to Row Active delay (tRRD) 28 1Eh 7.5 ns
3.0, CL = 5
2.03, CL = 4
Minimum RAS to CAS delay (tRCD) 29 32h 12.5 ns
5.0, CL = 5
3.37, CL = 4
Minimum Active to Precharge Time (tRAS) 30 2Dh 45.0 ns
18.0, CL = 5
12.16, CL = 4
Module Bank Density 31 80h 512 MB
Write recovery time (tWR) 36 3Ch 15.0 ns
6.0, CL = 5
4.05, CL = 4
Internal write to read command delay (tWTR) 37 1Eh 7.5 ns
3.0, CL = 5
2.03, CL = 4
Internal read to precharge command delay (tRTP) 38 1Eh 7.5 ns
3.0, CL = 5
2.03, CL = 4
SDRAM Device Minimum Active to Active/Auto Refresh Time (tRC) 41, 40 37h, 00h 55.0 ns
22.0, CL = 5
14.86, CL = 4
SDRAM Device Minimum Auto-Refresh to Active/Auto-Refresh Command Period (tRFC) 42, 40 69h, 00h 105.0 ns
42.0, CL = 5
28.38, CL = 4
Maximum device cycle time (tCKmax) 43 80h 8.0 ns
SPD Revision 62 12h Revision 1.2
Checksum for Bytes 0-62 63 90h 144 (true)
Manufacturer’s JEDEC ID Code 64-71 7Fh, 7Fh,
9Eh
Corsair
Module Part Number 73-90 CM2X1024-9136C5D
CM2X1024-8888C4D
Module Manufacturing Date 93-94 FFh, FFh Not defined
Module Serial Number 95-98 FFh, FFh,
FFh, FFh
Not defined

The standard SPD sections of XMS2-9136C5D and XMS2-8888C4D modules match to within Part Number — CM2X1024-9136C5D and CM2X1024-8888C4D correspondingly. The fastest mode these modules are capable of is characterized by the cycle time of 2.5 ns (400 MHz, DDR2-800). This mode corresponds to the first of supported tCL values (tCL = 5). The full timings scheme is written as 5-5-5-18, which matches official characteristics published in the datasheets. Reduced CAS# latency (CL X-1 = 4) corresponds to the non-standard cycle time of 3.7 ns, approximately 270 MHz — it probably means DDR2-533 and the cycle time of 3.75 ns. Incorrect cycle time results in fractional timing values, which can be written as 4-3.4-3.4-12.2 (rounded to one figure after the dot) and rounded up to 4-4-4-13. DDR2-533 mode is not topical today, especially for such fast modules. So these values hardly make sense — in our opinion, it's high time to remove them from SPD.

Manufacturer’s JEDEC ID Code and Part Number of the module are correct. Nevertheless, as in the other Corsair modules, the SPD chip of these modules lacks data on the manufacturing date and serial number (they are filled with FFh in these modules).

Let's review the most important data from the "non-standard" SPD section that corresponds to EPP profiles, represented by Bytes 99-127 of the SPD content.

EPP Standard Description:

XMS2-9136C5D

Parameter Byte(s)
(bits)
Value Expansion
EPP Identifier String
99-101
4E566Dh
EPP SPD Support
EPP Profile Type Identifier
102
B1h
Full Profiles
Profile for Optimal Performance
103 (1:0)
01h
Profile 1
Enabled Profiles
103 (7:4)
02h
Profile 0: not available
Profile 1: available
Profile 1
Voltage Level
116 (6:0)
0Ch
2.1 V
Addr CMD rate
116 (7)
01h
2T
Cycle time (tCK)
121
1Dh
1.75 ns (571.4 MHz)
CAS# latency (tCL)
122
20h
5
Minimum RAS to CAS delay (tRCD)
123
23h
8.75 ns (5.0)
Minimum Row Precharge Time (tRP)
124
23h
8.75 ns (5.0)
Minimum Active to Precharge Time (tRAS)
125
1Ah
26.0 ns (14.9)
Write recovery time (tWR)
126
3Ch
15.0 ns (8.6)
SDRAM Device Minimum Active to Active/Auto Refresh Time (tRC)
127
37h
55.0 ns (31.4)

The XMS2-9136C5D modules support EPP and contain information about two "extended" profiles. Only the second profile (Profile 1) is topical, naturally marked as optimal (recommended to use by default). This profile corresponds to DDR2 mode with the 1.75 ns cycle time, that is 571 MHz, which corresponds to DDR2-1142. Timings of this profile cannot be written in integer numbers - 5-5-5-14.9. Motherboards with EPP support should detect this scheme as 5-5-5-15. Address command rate of this profile is 2T, module voltage — 2.1 V.

XMS2-8888C4D

Parameter Byte(s)
(bits)
Value Expansion
EPP Identifier String
99-101
4E566Dh
EPP SPD Support
EPP Profile Type Identifier
102
B1h
Full Profiles
Profile for Optimal Performance
103 (1:0)
01h
Profile 1
Enabled Profiles
103 (7:4)
02h
Profile 0: not available
Profile 1: available
Profile 1
Voltage Level
116 (6:0)
1Ch
2.4 V
Addr CMD rate
116 (7)
01h
2T
Cycle time (tCK)
121
18h
1.8 ns (555.5 MHz)
CAS# latency (tCL)
122
10h
4
Minimum RAS to CAS delay (tRCD)
123
1Dh
7.25 ns (4.03)
Minimum Row Precharge Time (tRP)
124
1Dh
7.25 ns (4.03)
Minimum Active to Precharge Time (tRAS)
125
15h
21.0 ns (11.67)
Write recovery time (tWR)
126
3Ch
15.0 ns (8.33)
SDRAM Device Minimum Active to Active/Auto Refresh Time (tRC)
127
37h
55.0 ns (30.56)

The XMS2-8886C4D modules have a similar EPP configuration— only the second of two "extended" profiles is active and "optimal". It corresponds to DDR2 mode with the cycle time of 1.8 ns, that is 555.5 MHz - "DDR2-1111". These timings again cannot be written in integer values - 4-4.03-4.03-11.67. Motherboards with EPP support should detect this scheme as 4-4-4-12. But they may round it up to 4-5-5-12. Address command rate - 2T, module voltage - 2.4 V.

Testbed configurations

Testbed 1

  • CPU: AMD Athlon 64 FX-62 (Socket AM2), 2.8 GHz (200 x14)
  • Chipset: NVIDIA nForce 590 SLI
  • Motherboard: ASUS CROSSHAIR, BIOS 0203 dated 09/12/2006

Testbed 2

  • CPU: Intel Core 2 Duo E6600, 2.4 GHz (266 x9)
  • Chipset: NVIDIA nForce 680i SLI
  • Motherboard: NVIDIA nForce 680i reference board, BIOS dated 10/20/2006

Test results

The XMS2-9136C5D modules were tested on two platforms, equipped with AMD Athlon 64 FX-62 (ASUS CROSSHAIR motherboard, Testbed 1) and Intel Core 2 Duo E6600 (a reference motherboard from NVIDIA based on the nForce 680i chipset, Testbed 2) correspondingly. Both motherboards support EPP to be compatible with the modules under review. As our tests were limited in time, the XMS2-8888C4D modules were tested only on the second platform.

The modules were tested in the following modes in all cases:

1. Nominal: the standard CPU clock rate, 400 MHz memory (DDR2-800), EPP data are either not used (Testbed 1), or used for finetuning temporal and voltage characteristics, while the memory bus clock was specified manually (Testbed 2).

2. Optimal, corresponds to an EPP profile, but it does not allow CPU overclocking (only for AMD, Testbed 1).

3. Optimal, allows CPU overclocking, allows to reach maximum recommended memory frequency.

4. Maximum memory overclocking, allows CPU overclocking.

XMS2-9136C5D

Parameter Testbed 1 Testbed 2
CPU clock, MHz
(FSB clock x FID)
2800
(200x12)
2800
(280x10)
2860
(286x10)
3000
(300x10)
2400
(266x9)
2400
(266x9)
2400
(266x9)
Memory frequency, MHz
(DDR2 MHz)
400
(800)
560
(1120)
572
(1144)
600
(1200)
400
(800)
568
(1136)
600
(1200)
Default memory timings, voltage
5-5-5-18-
2T, 2.1V
5-5-5-15-
2T, 2.3V
5-5-5-15-
2T, 2.3V
5-5-5-15-
2T, 2.3V
5-4-4-11-
1T, 2.1V
5-5-5-15-
2T, 2.1V
5-6-6-16-
2T, 2.3V
Minimal memory timings, voltage
3-4-3-2T,
2.3V
5-5-4-2T,
2.3V
-
-
4-4-3-1T,
2.3V
-
-
Average memory read bandwidth, GB/sec,
1 core
4.23
(4.52)
4.84
(4.84)
4.94
5.19
7.40
(7.52)
7.65
7.65
Average memory write bandwidth, GB/sec,
1 core
3.56
(3.60)
4.01
(3.99)
4.10
4.28
2.89
(2.90)
3.00
3.05
Max. memory read bandwidth, GB/sec,
1 core
8.60
(9.14)
9.40
(9.38)
9.55
10.07
7.56
(7.69)
7.67
7.67
Max. memory write bandwidth, GB/sec,
1 core
8.05
(8.10)
8.05
(8.07)
8.22
8.62
4.88
(4.88)
4.88
4.88
Average memory read bandwidth, GB/sec,
2 cores
7.01
(7.70)
8.26
(8.38)
8.45
8.83
-
-
-
Average memory write bandwidth, GB/sec,
2 cores
4.10
(4.27)
5.24
(5.33)
5.45
5.59
-
-
-
Max. memory read bandwidth, GB/sec,
2 cores
8.71
(9.79)
11.19
(11.27)
11.42
11.93
-
-
-
Max. memory write bandwidth, GB/sec,
2 cores
7.37
(7.62)
7.71
(7.76)
7.93
8.27
-
-
-
Minimum pseudo-random access latency, ns
26.7
(23.6)
22.1
(22.1)
21.7
20.5
49.0
(48.7)
46.9
47.0
Minimum random access latency*, ns
68.3
(60.6)
63.2
(65.1)
62.2
59.0
74.2
(71.8)
70.4
70.2

*32 MB block size

The platform based on AMD Athlon 64 FX-62 (Testbed 1) in DDR2-800 mode uses standard timings (5-5-5-18-2T), written in the standard SPD section. If we raise memory voltage to a reasonable level (2.3 V), minimal timings obtainable in this case are 3-4-3-2T. Note that the system works even with tougher timings (3-3-3-2T). But in this case there soon appear memory errors, which can be detected in RightMark Memory Stability Test. "Extreme" timings noticeably increase the maximum real memory bandwidth (from 8.60 GB/s to 9.14 GB/s for reading data in a single stream, from 8.71 GB/s to 9.79 GB/s — two streams) and reduce latencies (from 68.3 ns to 60.6 ns for random access).

In the second case (maximum performance mode, no CPU overclocking) memory frequency does not reach the value specified by the manufacturer for the above mentioned reason. It's 560 MHz ("DDR2-1120", CPU clock rate - 2.8x10 = 2800 MHz, memory frequency divider - 5). Timings correspond to the EPP profile — 5-5-5-15-2T. But we had to raise voltage to get stable memory operation at this frequency on this platform (Testbed 1) — from recommended 2.1 V to 2.3 V. We managed to set timings to 5-5-4-2T in these conditions (2.3 V). But as you can see from the above data, it has practically no effect on memory performance.

Maximum performance mode (the one that allows CPU overclocking) allows to reach maximum memory frequency. In our case it was even a tad higher — 572 MHz ("DDR2-1144", CPU clock rate = 286x10 = 2860 MHz). Like in the previous case, we had to raise memory voltage from 2.1 V to 2.3 V. Minimum timings in this case match the nominal scheme (5-5-5-15-2T). As we might expect, speed characteristics of the memory system get an advantage over the above-mentioned case without CPU overclocking, which is proportional to a CPU overclocking factor (2.86/2.80 GHz — about 2%).

Then we decided to overclock memory to a maximum possible level. We managed to get memory operating at 600 MHz (that is "DDR2-1200") with the processor operating at 300x10 = 3000 MHz and the minimal memory frequency divider of 5. The standard timings are preserved - 5-5-5-15-2T. Maximum real memory bandwidth is significant in this case — 11.93 GB/s for reading data in two streams. The relative increase of memory bandwidth versus the nominal mode ("DDR2-1144") is approximately 4.5%, CPU being overclocked by approximately 4.9%.

The situation on the Intel Core 2 Duo & NVIDIA nForce 680i platform (Testbed 2) is different both in terms of settings and test results. First of all, this platform uses its own memory settings in the standard DDR2-800 mode. They do not match SPD/EPP data — 5-4-4-11, 1T address command rate (of course, it differs from 2T for the AMD platform — this parameter has to do solely with characteristics of the chipset/memory controller, but not with memory modules). Maximum real memory bandwidth values (we publish results for a single-thread memory access mode only, because double-thread access unexpectedly demonstrated worse results!) are lower than the AMD results obtained above. Moreover, reduced memory timings have practically no effect on them. In our case, minimum possible timings were 4-4-3-1T at 2.3 V. 3-3-3-1T and even 4-3-3-1T resulted in errors, including boot up failures.

The "DDR2-1136" mode (568 MHz memory), specified in the EPP profile, was reached without overclocking the processor owing to flexible configuration of asynchronous mode in the nForce 680i chipset — memory bus/FSB frequency ratio in this chipset can take various values (in this case — 32/15 = 2.133) at little steps (1/15), which correspond to the memory change steps - 18 MHz. Timings in this case match the EPP data — 5-5-5-15-2T, 2.1 V. There is no need to raise it on this platform, unlike AMD. Despite the significantly increased memory frequencies (from 400 MHz to 568 MHz), the difference in memory bandwidth and latencies between these two modes is... practically unnoticeable! It means that such fast memory is absolutely inexpedient on this platform (with not the fastest Intel Core 2 Duo E6600).

Anyway, we evaluated the overclocking capacity of these modules on this platform. Maximum memory frequency here is also 600 MHz. Timings are automatically extrapolated in this case to 5-6-6-16-2T.

XMS2-8888C4D

Parameter Testbed 2
CPU clock, MHz
(FSB clock x FID)
2400
(266x9)
2500
(278x9)
2400
(266x9)
Memory frequency, MHz
(DDR2 MHz)
400
(800)
555
(1111)
622
(1244)
Default memory timings, voltage
4-3-3-9-2T,
2.4V
4-5-5-12-2T,
2.4V
5-5-5-14-2T,
2.4V
Minimal memory timings, voltage
3-3-2-2T,
2.4V
4-4-3-2T,
2.4V
-
Average memory read bandwidth, GB/sec,
1 core
7.55 (7.72)
7.92 (7.95)
7.69
Average memory write bandwidth, GB/sec,
1 core
2.99 (3.05)
3.16 (2.94)
3.15
Max. memory read bandwidth, GB/sec,
1 core
7.70 (7.76)
7.94 (7.97)
7.74
Max. memory write bandwidth, GB/sec,
1 core
4.88 (4.88)
5.08 (5.08)
4.88
Minimum pseudo-random access latency, ns
48.7 (46.8)
45.1 (45.1)
47.0
Minimum random access latency*, ns
70.2 (66.5)
67.5 (67.3)
66.4

*32 MB block size

The XMS2-8888C4D modules were tested only on the platform Intel Core 2 Duo & NVIDIA nForce 680i. These modules were also tested in three modes: official DDR2-800, recommended "DDR2-1111", as well as when memory was overclocked to maximum.

In the first case, we used 4-3-3-9-2T timings, which were probably obtained by extrapolating values of the only EPP profile (frequency was reduced). At the same time, minimal possible timings were much more "extreme" — 3-3-2-2T (nForce 680i allows to set tCL, tRCD and tRP up to 1(!); values atypical of DDR2 really affect memory operation). But even in this case reducing the timings has little effect on memory speed.

In order to use XMS2-8888C4D modules in "DDR2-1111" mode (that is at 555 MHz), we had to overclock the processor (bus) to 2.5 GHz (278 MHz FSB), because this FSB frequency corresponds to the closest memory (555 MHz) /FSB (278 MHz) frequency ratio - 2.0. Timings in this case were set to 4-5-5-12-2T versus expected 4-4-4-12-2T. Thus, the above assumption (made when we described EPP contents of these modules) is true: the EPP scheme, expressed in real numbers as 4-4.03-4.03-11.67, is indeed rounded up to 4-5-5-12. Of course, you can modify it manually, especially as the modules are stable even with 4-4-3-2T timings. Raising CPU clock rate immediately affects memory performance. For example, maximum real memory bandwidth grows (versus the previous case) from 7.70 GB/s to 7.94 GB/s, that is approximately by 3.1%, CPU being overclocked by 4.2%. Lower timings increase memory bandwidth values, but not much.

And finally, in the last case, when we tried to reach maximum possible memory frequency, FSB frequency was set back to the old level (266 MHz), and memory bus frequency was gradually growing. The modules worked well at 622 MHz (that is in "DDR2-1244" mode) with 5-5-5-14-2T timings. A further increase in frequency to approximately 640 MHz ("DDR2-1280") resulted in serious memory failures. As in case of the XMS2-9136C5D modules, overclocking XMS2-8888C4D modules has almost no effect on memory performance, because it's evidently limited on this platform by the not very fast Intel Core 2 Duo E6600 processor.

Bottom line

The memory modules from the new Corsair DOMINATOR series stand up to the typical level of this manufacturer. They demonstrated good compatibility with our testbeds supporting EPP. They possess a considerable safety margin, that is they can be significantly overclocked in terms of frequencies and timings. Minimal timings in the standard DDR2-800 mode depend much on a platform. We published them together with maximum attainable frequencies in the table below.

Memory modules Platform Min. timings
(DDR2-800)
Max. frequency,
MHz (DDR2)
XMS2-9136C5D
AMD AM2, nForce 590 SLI
3-4-3-2T (2.3 V)
600 (1200)
Intel Core 2 Duo, nForce 680i SLI
4-4-3-1T (2.3 V)
600 (1200)
XMS2-8888C4D
Intel Core 2 Duo, nForce 680i SLI
3-3-2-2T (2.4 V)
622 (1244)

What concerns revealing speed potential of such fast modules, our tests demonstrated that we can expect it to some degree (as the theoretical maximum of DDR2-800+ memory is still unreachable) on the AMD platform with the top Athlon 64 FX-62 processor. At the same time, using such fast memory modules in mediocre computers, like our testbed with Intel Core 2 Duo E6600 (2.4 GHz), will be a big mistake, because even DDR2-800 memory is more than enough for such systems.

And finally, we should mention some drawbacks discovered in the course of our analysis. The XMS2-9136C5D modules, which were examined the first, required raising their voltage from official 2.1 V to 2.3 V in the recommended "DDR2-1142" mode on the AMD platform. The XMS2-8888C4D modules on the Intel Core 2 Duo/NVIDIA nForce 680i platform used more conservative timings by default - 4-5-5-12-2T (versus the official 4-4-4-12-2T). It has to do with EPP data rounding-off errors. Nevertheless, let's hope that these drawbacks are inherent only in early revisions of DOMINATOR modules and will be fixed soon.

Corsair DOMINATOR modules and
the NVIDIA nForce 680i motherboard were kindly provided by the representative office of
Corsair Memory in Russia

Dmitri Besedin (dmitri_b@ixbt.com)
December 22, 2006


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