Zarlink Semiconductor introduced the first in a family of voice processing chips aimed at improving voice quality and reducing noise in hands-free communication devices. An undisclosed manufacturer has already designed Zarlink’s acoustic echo canceller technology into a hands-free car phone system.
Hands-free communication systems are often hindered by acoustic echo that is created when the voice from the loudspeaker in a car kit or conference phone, for example, is picked up by the microphone and retransmitted. Mobile network delays also make acoustic echo more noticeable.
ZL38002 uses an advanced adaptive algorithm that constantly tracks and reduces background noise while preserving voice quality. Voice signals are transmitted in both directions, allowing natural two-way conversation, even when signal levels are low. The ZL38002 chip utilizes an advanced non-linear process design supporting full-duplex speech with no switched loss of the signal path. The algorithm design operates during double-talk situations when both callers are speaking at the same time.
Programmable noise reduction allows the user to adjust the noise cancellation level to meet system requirements without distorting the audio signal. Another feature is anti-howling detection that identifies instability in the audio path and automatically takes preventative measures to avoid oscillation.
The ZL38002 device is now available in a 36-pin QSOP (Quarter Small Outline Package) and 48-pin TQFP (Thin Quad Flat Package) chip measuring just 7x7mm. Lead-free package options are also available. The chip is fully supported by an evaluation board, hands-free car kit application board and API software. In quantities of 1,000, the device is priced at US$5.50.
Source: Zarlink Semiconductor
Micron introduced new PC2-5300 and PC2-6400 DDR2 VLP (Very Low Profile) registered and unbuffered mini dual-inline memory modules (MiniDIMMs) for the networking and communications equipment markets. Available in densities of 256MB, 512MB, and 1GB, the reduced height form factor (18.29mm) of Micron´s VLP MiniDIMMs enables designers to integrate more modules in the same or less board space, thereby improving performance in networking servers, routers, switches, gateways, hubs and bridges.
The low profile of Micron’s VLP DDR2 MiniDIMMs enables vertical socketing on the board, in contrast to traditional angled memory sockets, and effectively reduces the total memory space footprint. According to the company, this form factor can improve air flow and thus system reliability. VLP MiniDIMMs are backward compatible with existing MiniDIMM sockets, enabling engineers to receive immediate benefits without any product redesign.
The PC2-5300 and PC2-6400 DDR2 VLP registered and unbuffered MiniDIMM production samples are currently available, and volume production is expected in Q4´2005.
Intel announced it is accelerating the availability of dual-core, hyper-threaded Intel Xeon processors and Intel Xeon processors MP. In addition, Intel has begun a broad evaluation program of thousands of dual-core platforms for software developers and enterprise customers.
Originally due in 2006, Intel plans to introduce the dual-core Intel Xeon processor MP, codenamed "Paxville", for servers with four or more processors later in 2005. Paxville is claimed to provide more than 60% performance boost over previous generations (Java Performance) and will use the Intel E8500 chipset, which has been architected for dual-core performance and was introduced earlier this year.
For dual processor servers, Intel plans to ship a dual-core Intel Xeon processor, codenamed "Paxville DP" in 2005. Paxville DP will deliver up to 50% improved performance over previous generations (same Java Performance) and will use the Intel E7520 chipset.
Paxville DP is targeted at early adopters and evaluators of dual-core technology and is to be followed by a broader family of dual-core Intel Xeon processor-based platforms, codenamed "Bensley" for servers and "Glidewell" for workstations, in the first quarter of 2006. Bensley and Glidewell are targeted to complete the transition to dual-core top to bottom in Intel’s entire server and workstation line-up.
Both 64-bit Paxville and Paxville DP processors will utilize Intel Hyper-Threading Technology and will also include enhanced security features such as Execute Disable Bit and improved power management with Demand Based Switching.
At the moment Intel has 17 multi-core projects under development and expects more than 85% of its server volume exiting 2006 to be multi-core processors.
TI announced its third generation Power-over-Ethernet controller technology that eases implementation of Ethernet-powered devices such as WLAN access points, IP phones, security and RFID scanners.
The TPS23750 is a highly integrated circuit that combines the functionality of TI´s TPS2375 powered device controller with a primary side DC/DC pulse-width modulation (PWM) controller to effectively manage discovery, classification and delivery of direct-current power to an end appliance.
The controller supports non-isolated or isolated power supply topologies required by WLAN access point systems, IP phones and other systems, including flyback, forward or non-synchronous low-side buck topologies.
The TPS23750 can withstand voltage transients up to 100 V and operates over an industrial temperature range of —40°C to 85°C. In addition, the controller is housed in a PowerPad package with an internal 0.7-ohm FET to minimize heat dissipation in the system. The TPS23750 also protects the powered system through thermal shutdown and current limiting.
The integrated device relies on a tiny external resistor to set the switching frequency, allowing greater flexibility for power stage component selection. A fixed 140-mA of in-rush current limit also eases powered device startup. The TPS23750´s power conversion functionality includes many additional protection features, such as programmable soft start, hiccup-type fault limiting, a 50 percent maximum duty cycle and a true-voltage output error amplifier.
To meet power requirements of certain legacy systems not fully 802.3af-compliant, TI also announced its TPS23770 integrated powered device controller, which includes an under-voltage lockout turn-on voltage that is compatible to legacy systems.
The TPS23750 and TPS23770 powered device controllers are available in volume today from TI and its authorized distributors. Packaged in a 20-pin, high-power, thin shrink small outline package (HTSSOP), suggested resale pricing for both devices is $1.75 each in quantities of 1,000 units. Evaluation modules of the TPS23750 and TPS23770, complete reference designs, application notes and technical documentation are available through power.ti.com/poe.
AMD today introduced the Mobile Athlon 64 4000+ processor, designed for full-size notebooks, supporting Enhanced Virus Protection (EVP; works under Windows, Linux, Solaris and BSD Unix) and AMD PowerNow!.
Fujitsu Siemens Computers plans to incorporate the novelty into a new AMILO A1667G notebook, which is expected to be available next month throughout Europe.
Considering the new addition to the series, the Mobile AMD Athlon 64 processor line offers 4000+, 3700+, 3400+, 3200+, 3000+ and 2800+ products.
By the way, AMD has recently expanded the offerings in the Mobile AMD Sempron processor family as well. Mobile AMD Sempron processors are now available in models 3300+, 3100+, 3000+, 2800+ and 2600+ for thin and light notebooks, as well as models 3300+, 3100+, 3000+, 2800+ and 2600+ for full-size notebooks.
The Mobile AMD Athlon 64 processor 4000+ is already available worldwide being priced at $382 in 1,000-unit quantities.
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