• Technology: 0.15-micron, 76 M transistors, 860-pin HSBGA package
• 4 pixel rendering pipelines, up to 2 textures per clock 
• 256-bit interface of DDR memory (up to 20 GB/s at 312.5 MHz DDR) 
• Full support of DirectX 8 pixel and vertex shaders, VS 2.0 in DirectX 9, OpenGL 2.0 
• Optimized graphics pipeline supporting SIMD (single instruction, multiple data) arrays
• Software full-screen anti-aliasing
• Performance: up to 170 Gflops/1 TeraOp 
• Virtual memory subsystem where all memory requests are located in a single virtual address space of 16 GB which allows P10 based boards to avoid limitations of the on-board graphics memory
• Multithread processing of commands which emulates several virtual VPUs 
• Programmable modules supporting complex commands including subroutines and loops; texture decompression modules and real-time wavelet geometry
• Dual integrated 370-MHz 10bit RAMDAC 
• Full 2D and 3D acceleration on two screens, overlay with double hardware buffering

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