iXBT Labs - Computer Hardware in Detail






Intel i815 Step-B Chipset
and D815EPFV Mainboard

June 22, 2001

A "new" Pentium III (Tualatin) and modernized chipsets for it are spoken about for quite a long time. VIA Technologies and SiS announced new chipsets intended for working with CPUs of this type. Intel launched only a new revision of the i815. Our tests show that such modesty of the top manufacturer of chipset for Socket 370 platforms is justified. But this will be discussed a bit later and now we are turning to out today's hero - i815 "B-step", i.e. a new revision of the chipset intended for the Pentium III "Tualatin". The D815EPFV Desktop Board will represent this chipset.

i815 "B-step" chipset

The new stepping offers no cardinal changes as compared with the previous incarnation. If you want to study such characteristics as registers, voltage and other details then I recommend you to read the following section, which describes all differences of the new stepping of the i815 (as well as of the processor this chipset is meant for). Otherwise, you can read only the conclusion down a couple of screens.

Tualatin logical environment

All existent types of system logic sets (logical environment, chipset) of the i82815XX series from Intel are designed by means of combination of main components of the given series. In the systems optimized for processors based on the 013mkm fab process and on the modernized Pentium III core (so called 0.13-micron series, Tualatin), there are two modifications of the i82815xx series used - i82815 logic and i82815E one. These chipsets used for systems with Universal ZIF Socket 370, like their usual brothers, consist of three components: a north bridge (GMCH - Graphics and Memory Controller Hub), a south bridge (ICH - I/O Controller Hub) and FWH - FirmWare Hub.

New sets - i82815 and i82815E - meant for a 0.13-micron processor (For Use with Universal Socket 370) differ only in an ICH: the i82815 logic uses the first version (ICH, FW82801AA), and the i82815E uses the second one (ICH2, FW82801BA). In all other respects the chipsets are identical - they both use a special version (B0 stepping) of the major hub (FW82815-B0). Let's examine the major characteristics of the components of these logic sets with regard of the modernization of the final universal system:

  • The processor/system buses are optimized for present-day processors implemented according to the 0.18-micron process and using FC-PGA package: Celeron 533A and higher working at the 66 MHz system signal synchronization frequency; PentiumIII functioning at the 133 MHz reference frequency, and new processors based on the 0.13-micron process, using FC-PGA2 package and synchronized with the 133 MHz signal BCLK.
  • The system bus is optimized for 32bit addressing. Circuits of synchronization signal receivers and transmitters use only the AGTL/AGTL+ bus (Open-drain Structure that requires a terminator dragging the system up to a high voltage VTT) with a voltage level equal to 1.25/1.5 V respectively, characterized by better noise immunity as compared with the GTL+ and by a lower noise level which is defined by a less duration of signal commutation. Input circuits of the receivers are differential. Therefore, a signal is taken relatively to an input reference voltage (VREF), the level of which is 2/3 of the terminator voltage (VREF=2/3*VTT).
  • The memory subsystem is intended only for a synchronous SDRAM, uses a 100/133 MHz synchro-signal, supports a maximum of 6 memory banks (6 lines of single load, or 3 lines of double load) and the volume up to 512 MBytes. The memory controller supports symmetric and asymmetric addressing, is intended for X8 and X16 memory chips, supports CBR (CAS-before-RAS) regeneration mechanism. Memory modules with error correction control (ECC SDRAM DIMM) or with chips-registers (Registered SDRAM DIMM) are not supported by these systems.
  • AGP (Accelerated Graphics Port) interface uses a 1.5/3.3 V signal, supports AGP 2.0 specification and works in 1X/2X/4X modes. The chipsets do not support a direct data transfer protocol by-passing a system RAM - Fast Write mode unallowed on the hardware level in the command register (GPCMD) and in the status register (AGPSTAT) of AGP interface control of the GMCH. An AGP semantic traffic to the memory doesn't use a system bus tracing mechanism, that is why it is not coherent relatively to the processor cache.
  • Integrated graphics controller i752 supports a great deal of 3D functions, contains 230 MHz RAMDAC, and addresses a maximum of 4 MBytes of a display cache, whose interface is multiplexed with the AGP bus. The AGP port, apart from being used as an interface of installation of a separate graphics adapter, is used for extending a display cache volume - 32bit 133 MHz interface SDRAM, extended with the help of a specialized module AIMM (AGP In-line Memory Module) of the 2X 1MX16 or 1X 2MX32 configuration, which is inserted into an AGP slot.
  • The ICH supports: PCI 2.2 interface (up to 6 pairs of requests/resolutions), 2 channels (2 devices per channel) of the Ultra ATA/66 specification (FW82801AA hub) or of the Ultra ATA/100 (FW82801BA hub) of the Bus Master IDE controller, 2 USB ports for ICH and 4 ports for ICH2 1.1, integrated extended I/O interrupt controller APIC (15 interrupts in the 8259 mode and 24 interrupts in the extended mode), SMBus (System Management Bus) controller, LPC interface, AC97 codec interface, LAN-controller integrated into the ICH2 (the ICH lacks for a LAN-interface).

These versions of logic sets are developed for end systems meant for support of the Celeron/PentiumIII based on the 0.18/0.13-micron processor, using FC-PGA and FC-PGA2 package with IHS (Integrated Heat Spreader), and do not support PentiumII processors. It is accounted for by a complete transfer to the AGTL/AGTL+ bus and by the Vcore range supported by the system (VCCCORE) - it results from utilization of a new version of a VR (Voltage Regulator) or a VRM (Voltage Regulation Module) of the 8.5 version.

Let's study the construction of the system which supports both old (0.18-micron) and new (0.13-micron) processors. It is very important for you to understand distinctive features of the new processor and the necessary circuit modifications in the controlling logic circuits. The outputs of the AF36, AG1, AJ3, and AK22 have undergone changes of the signal destination, and the PICCLK, PWRGOOD and VTT signals in the new processor have changed a voltage level. Besides, VTTPWRGD signal was added. FET switch circuits were added to some of the above mentioned outputs for a control of a line status with regard of the processor used - a status is defined according to an identification phase. The total number (see table 1, table 2, table 3, table 4) of circuit modifications for the new processor is very large.

For example, a line of an input signal of synchronization of the APIC (PICCLK) circuits of the new processor requires a voltage level of 2.0V as compared with old systems with 2.5V. Signal control circuits PWRGOOD now have a 1.8V level, against earlier 2.5V. Besides, they have added a divisor to provide a 2.1V level which meets the requirements of the whole series of 0.18/0.13 processors. A terminator voltage level (VTT), to which AGTL/AGTL+ bus signals are dragged to, decreased to 1.25V in the systems with a 0.13-micron processor, against earlier used 1.5V, - a circuit of controlling these lines in the universal system is also based on the FET-switches. The reference voltage level GTLREF, which makes 2/3 of the VTT (roughly 0.7*VTT), has also changed. Therefore, circuits for controlling this signal for 0.18/0.13 processor require a separate resistor to divide sources for different processors. The AGTL and AGTL+ protocols are incompatible since they use different signal switch levels - and new 0.13-micron processors can't work in systems based on the standard protocol AGTL+.

Configuration of non-VTT lines (of non- AGTL/AGTL+ levels) is implemented for 0.13-micron processors according to the status of VTTPWRGD signal, which is connected in 0.18-micron processors with the VSS line (constantly low level). The circuit of the VTTPWRGD signal source and an output of the processor of the same name has 1kOhm resistance between them.

A reference signal of the VCMOS level in the systems with 0.18-micron processors is specified with the same source as a terminator voltage (directly by the processor). But in the new 0.13-micron processors this level is not generated, that is why a universal system must have a separate VCMOS former, and destination of the signal of the output of the new processor AK22, which controls the GTL_REF level in "old" ones, must be changed for VCMOS_REF. To provide the compatibility of the platform with 0.18/0.13-micron processors the interface circuit for connection of AK22 processor outputs with the logic has a parallel RC circuit.

Since the universal Socket 370 mainboard uses a new version of the logic set and is meant for compatibility of 0.18/0.13-micron processors, its design is intended for systems which use GMCH of the B0 stepping and makes 0.13-micron processors incompatible in case of earlier revisions of the GMCH. A special protection circuit prevents damage of new processors: it checks whether the equipment used is appropriate - the AJ3 processor output with the help of the 0Ohm resistor is grounded. In contrast to old processors where this output was grounded, in the new processors the AJ3 is responsible for a hardware reset (RESET# signal): if we install a 0.13 micron processor into a base system with the GMCH revision earlier than B0, the protection system will work: a reset signal will be applied to the processor circuit all the time, while usage of old processors will be flawless in this system. But if in the system (irrespective of the chipset revision) the AJ3 line is not loaded (the specified register is not used), the new processor must pass a detection phase with all other terms implemented (correctness of the powering protocol). This circuit, therefore, is realized to avoid possible incompatibility of a hub revision, but end users of motherboards may not realize it. Also, it means that usage of a 0.13-micron processor is possible on any chipset that provides a support for the required AGTL-levels.

A processor must be identified for the correct recognition by the system. A role of some kind of an identification flag is implemented by an AF36 output, which is grounded in old processors, and is not connected in new ones. The circuit of this output in the universal system uses TTL-compatible levels and forms two branches TUAL5/TUAL5#, according to the status of which a processor installed in the socket is defined unambiguously: if TUAL5 signal is dragged up to 5V, and the TUAL5# - to a low voltage level, the system contains a 0.13-micron processor; otherwise, it is a 0.18-micron one. Since these processors have different VTT levels, there is a FET-switch based circuit which commutates a source between the respective levels 1.25/1.5 V. The AG1 output which defines a current AGTL/AGTL+ level is controlled by the status of the TUAL5 line after the processor identification process: if the line has a high status, the source generates 1.25V, otherwise - 1.5V.

Identification of the processor on the GMCH level is implemented according to the status of the SMAA12 level which depends on the TUAL5 level, and finally on decoding of a status of the signal on the AF36 output: if the AF36 output is in the high-impedance state (HiZ), the system is notified about a 0.13 processor according to a high level of the CPUPRES# signal that controls the PWRGOOD logic; if in a low state, the system is notified about a 0.18 processor according to a high level of the CPUPRES# signal; according to a low state of the CPUPRES# signal the system is informed about the absence of a processor in the socket. The CPUPRES# signal is read by the controlling logic together with the combination of the supply voltage identifier VID[3:0] and notifies the system about a processor in the socket.

Unlike the 0.18micron processors FC-PGA which have a 4bit code of the voltage identifier VID[3:0], a 0.13-micron processor contains the fifth distinguishing bit - a VID25mV signal (analog to VID4 in the processors implemented in the S.E.C.C./S.E.P.P), which corresponds to the AK36 output, which in old processors has VSS (50mV increment). That is why now a full supply voltage identifier of the new processor has a signature: VID[25mV, 3:0]. From the standstill of the VCCCORE a high level of the VID25mV signal indicates that the core voltage has the accuracy of 0.005V. Without the VID25mV flag (a low level) binary combinations of the VRM 8.5 are identical to the combinations of the VRM 8.4 volt-regulator - a thing necessary for the universal platform in question and accounted for by the compatibility with the voltage code for 0.18-micron processors.

And now I should make a conclusion. The new stepping of the chipset is meant exactly for support of the correct operation with new 0.13-micron processors. Tualatin processors won't work on the mainboards based on the earlier revisions of the i815 chipset in full correspondence with the specification. But on the boards, based, for example, on the 440BX, a reset signal won't be applied. It is a starting point of the mistake that new 0.13micron processors from Intel work flawlessly on these boards. But do read the differences in the specs once more - the VRM 8.5 provides a 0.005 V step, and the VRM 8.4, VRM 8.3 and VRM 8.2 series have a 0.05V step. Since the Tualatin core is powered with 1.425 V, such voltage level can be provided only by the VRM 8.5. That is why operation of a 0.13 micron processor on your old mainboard depends, and can make from several minutes to several hours. That is why such risk is justified only if your experiment aims to take a screenshot at the maximum possible processor frequency.

Intel D815EPFV board

The new chipset allows saying that the board deserves to be reviewed - but there must be something else to attract attention beside a new set of chips. Whatever the contents may be, the functionality and a well thought-out design must be adequate. From the point of view of an ordinary user, for whom the main thing is flawless and immediate operation, this Intel board has no problems. But if you are considered an advanced user, i.e. if you have a strong desire to, for example, overclock something, the D815EPFV is not for you. Anyway, it is for you to choose.


  • Processor: FCPGA Socket 370 Intel Pentium III with 100/133 MHz bus and Intel Celeron with 66/100 MHz bus
  • Chipset: Intel 815EP (Intel 82815EP Memory Controller Hub (MCH), Intel 82801BA Enhanced I/O Controller Hub 2 (ICH2), Intel 82802AB Firmware Hub (FWH))
  • System memory:
    • 3 168-pin DIMMs, PC100/PC133 SDRAM
    • Memory up to 512 MBytes, ECC is unsupported
  • AGP slot with 4x mode support
  • Extension slots:
    • 3 32-bit PCI 2.2 slots
    • 1 CNR slot (Communication and Networking Riser) - optionally
  • I/O ports:
    • FDD, 2 serial and 1 parallel ports, ports for PS/2 mouse and keyboard
    • 4 built-in USB ports
    • Integrated IDE controller (2 IDE channels with support of ATA/33/66/100 protocols (up to 4 ATAPI-devices)
  • Integrated network controller: Intel Pro/100 adapter, 10/100 Mbit
  • Integrated sound: AC'97, Analog Devices AD1885 Codec chip
  • BIOS:
    • 4-Mbit Flash EEPROM
    • Phoenix BIOS with support of Enhanced ACPI, DMI, Green, PnP Features and Trend Chip Away Virus
  • Miscellaneous:
    • STR (Suspend to RAM)
    • Hardware monitoring
    • Wake on modem, mouse, keyboard, LAN, timer and USB
  • Dimensions: MicroATX form-factor, 244x240 mm

This board is another sample of the MicroATX format class which suits better those computers which are produced by OEM companies, than for realization of such products on the retail-market. The decreased number of extension slots and high integrity - network adapter and sound (and video in the EVF version of the board) makes me think that it will be installed in an office computer or in the second/third home computer for working with documents and/or on the Internet.

The board has 4 USB connectors, that is why there is a bracket for the rear panel of a computer of an unusual form. Besides, the box contains a board description, a CD with drivers and software, ATA100/66 and ATA33 cables, a bracket for the second serial port for the rear panel, and a FDD cable. Among the programs I want to mark out Norton Internet Security 2000, Norton AntiVirus 2000, and the file encryption software Encryption Plus.

As usual, the board is implemented competently, the layout is convenient. Since the board has its twin - D815EFV board based on the i815E chip, it has unsoldered connectors DVI and VGA. Due to lack of the latter, a serial port is located not in its usual place - if you need two COM-ports you must attach a bracket on the rear panel to a connector on the front side of the board. Unlike its competitors, Intel doesn't install LowESR capacitors on the board - but it makes impossible to change a FSB frequency, with the increase of which we need a core power supply track of higher quality. The board has only one jumper - in one of three positions we can enter the BIOS Setup to clear the passwords, in another position the board will try to read a file with the BIOS from a diskette or a CD (it is necessary if the contents of the BIOS chip is damaged.

The BIOS Setup has not a wide range of possibilities for configuring a system - it has no possibilities either to change a FSB frequency nor to change a voltage level of the core and of the chipset. But a user doesn't have to watch a booting and initialization process. Furthermore, the BIOS Setup has a very convenient menu navigation system, a sequence of HDD loading is done not according to HDD-0, HDD-1, but according to their names. The memory volume is displayed in MB, and not in millions of bytes. A PC-speaker is soldered right on the board. A stand-by LED is located on the board as well.

SoundMAX with SPX

Intel has obtained a 6-month exclusive right to use "SoundMAX with SPX" driver with its integrated mainboards for Pentium III and Pentium 4. So, a sound subsystem includes:

  • Hardware: Integrated AC-link controller in the Intel 82801BA I/O Controller Hub (ICH2) + audio codec v 2.2 Analog Devices AD1885.
  • Software: SoundMAX with SPX drivers from Analog Devices for Win98SE, WinME and Win2K.

According to the developers, compatibility with the game 3D sound API DirectSound/DirectX 8.0, A3D 1.0, EAX 1.0/2.0, I3DL2, Sensaura MacroFX and Zoom FX is supported. A new generation audio rendering technology SPX (Sound Production eXtention) allows us to control sound synthesis directly from games and multimedia applications. And all other standard 3D sound possibilities based on the Sensaura technologies are also provided: EnvironmentFX, 3D sound render with 26 presets and full support of EAX1.0/2.0, I3DL2 reverb; near field effects (Sensaura MacroFX) and far field ones (Sensaura ZoomFX); the technology which uses separate HTRF filters for headphones and 2/4/6 speakers Digital Ear (upgrade up to the technology of individual adjustment of HTRF filters Virtual Ear is possible); and the Virtual Theater Surround technology for listening to 4 and 5.1 channel sound tracks in movies (upgrade up to the similar technology for headphones Headphone Virtual Theater Surround is possible).

Later we will review all advantages and drawbacks of such software solution separately.


We consider that it makes no sense to comment the diagrams. You know quite well how efficient the Intel mainboard are, that is why it is hard to judge what contribution was brought in the the chipset and what by the manufacturer (ASUS tries not to produce slow products, and the CUSL2-C doesn't belong to them). The results prove that the old and new i815 chipset is, in principle, the same, and it hasn't changed as far as speed is concerned (at least, such changes do not exceed the precision of measurements, and unnoticeable in real operation). The AGP FastWrites support is still absent, what proves again that the changes are slight.

The board is reliable, stable, without a wide range of settings (impossible to set manually either a processor frequency of a memory clock speed - everything is made automatically according to the ID of the processor. It means that you can't make work a Celeron with 75 MHz FSB or set 133 MHz for a 100 MHz Pentium III), and quite ascetic.


Of course, the manufacturers have no reasons to continue production of the old version of the chipset since its operation with new processors is not warranted. The Intel D815EPFV is a traditionally reliable solution for all users who need a stable board and a convenient solution for OEM manufacturers who assemble machines mainly for a corporate market sector.

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