NEC's Technology Enables Automatic Parallelization Of Applications
NEC today announced that it has developed a multicore processor technology capable of performing automatic parallelization of application programs, without modifying them.
- An automatic parallelizing compiler, capable of effective extraction of parallelism from an application program utilizing its profile information.
- An additional instruction set, designed to minimize parallelization overheads.
- Processor architecture, which efficiently handles speculative execution.
- Implementation realized by a simple extension to conventional processors.
The distinctive feature of this new technology is the ability of the automatic parallelizing compiler that utilizes profile information to aggressively exploit parallelization patterns, which are effective for accelerating the speed of application programs. In addition, although the parallelization is speculative, the speculation is almost always completely accurate. The speculation hardware works as a safety net by handling any rare misses, guaranteeing the correctness of the execution. This ensures that the compiler is not conservative in decisions concerned with these cases, resulting in an increase in the amount of parallelism exploited. The parallelism exploitation is supported by the speculative execution hardware that realizes efficient handling of detection of incorrect execution orders caused by the parallel execution of the program parts, cancellation of the incorrectly executed part, and re-execution of it. Moreover, the parallelization process can be performed in a practical period of time.
NEC has succeeded in operating this technology on a field-programmable gate array (FPGA). Moreover, its implementation has confirmed that only a marginal hardware extension is required and that application program speed is actually accelerated.
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