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IMEC stuffed 9 bits in a memory cell

As they report at Silicon Strategies, IMEC, the independent research organization that specializes in design and manufacturing processes for integrated circuits, has developed a prototype non-volatile memory cell, that can store 9-bits.The technique could potentially be used to achieve a four-fold increase in memory density compared with leading floating gate memories in deployment today for a given manufacturing process. Normally a single memory bit is stored in each memory cell of a flash memory although Saifun Semiconductor Ltd. (Netanya, Israel) has demonstrated the ability to store a single bit at each end of a flash memory floating gate. This type of flash memory is called ´MirrorBit´ by FASL LLC and ´Nbit´ by Macronix International Co. Ltd.

Well, actually Saifun is rather aggresive as announced a plan to extend the technique to 4-bits per memory cell by combining two storage sites with two voltage levels per memory cell. Anyway, IMEC engineers still rocks with a device they call a ´ScanROM´ that can store 9-bits per memory cell. Details of the device are to be presented in a paper due to be presented at the Symposia on VLSI Technology and Circuits to be held at Honolulu, Hawaii in June 15-17, 2004.

By now it is known that the ScanROM is based on a dual-gate transistor with oxide-nitride-oxide (ONO) charge-trapping dielectric underneath the drain-side gate. In a prcis of the paper published ahead of the symposia the authors stated that multple bits are stored along the width of the device. By contacting the gates from both sides and applying an appropriate bias difference to each, the individual bits are addressed for both reading and writing. "We experimentally demonstrate reading and writing of 9-bits in a prototype cell," the authors said in the prcis.

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