Renesas announces 18 and 36 Mbit QDR II SRAM
Renesas Technology America, Inc., a joint venture of Hitachi, Ltd. and Mitsubishi Electric, announced a line of high-speed QDR II (Quad Data Rate-II) SRAM chips with 18 and 36 Mbit capacities for networking and comms, in particular for high-end routers and switches.
Used as buffer memory, new 0.13µm chips provide up to 1.33Gb/s throughput. Chips are packed into 165-pin FBGA (15x17mm) packages.
Chip |
Packet |
Architecture |
Name |
Price/availability |
36Mbit QDR-II SRAM (133, 167, 200, 250 MHz) |
2 words |
x8 |
HM66AQB8402BP |
$184-210 / Sept. 2003 (volume production in Dec. 2003) |
x9 |
HM66AQB9402BP |
x18 |
HM66AQB18202BP |
x36 |
HM66AQB36102BP |
36 Mbit QDR-II SRAM (167, 200, 250, 300, 333
ÌÃö) |
4 words |
x8 |
HM66AQB8404BP |
$184-196 / Sept. 2003 (volume production in Dec. 2003) |
x9 |
HM66AQB9404BP |
x18 |
HM66AQB18204BP |
x36 |
HM66AQB36104BP |
36 Mbit QDR-II SRAM (133, 167, 200, 250 ÌÃö) |
2 words |
x8 |
HM66AQB8202BP |
Q2 2004 |
x18 |
HM66AQB18102BP |
x36 |
HM66AQB36512BP |
18 Mbit QDR-II SRAM (167, 200, 250, 300, 333 MHz) |
4 words |
x8 |
HM66AQB8204BP |
Q2 2004 |
x18 |
HM66AQB18104BP |
x36 |
HM66AQB36514BP |
New 133/167/200/250 MHz 36Mbit chips with 2-word packets provide 7.5/6.0/5.0/4.0 ns clock times; 167/200/250/300/333 MHz chips with 4-word packets provide 6.0/5.0/4.0/3.3/3.0 ns clock times.
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